This invention relates generally to logic or memory circuits for producing a redundancy and more particularly, it relates to a redundancy enable/disable circuit having two programmable fuses for substituting spare rows or columns of memory elements in a memory array in place of faulty rows or columns which is formed with a reduced number of circuit components than those traditionally available.
As is generally known, semiconductor memories are manufactured in the form of a memory array of elements which is accessed by a row decoder and a column decoder in order to address a particular memory element or a row of memory elements in the memory array. A sense amplifier formed on the semiconductor chip is used to sense the memory state of the selected memory element when addressed by the row decoder and column decoder. In recent years, there has arisen the need of manufacturing semiconductor memories in which the memory array of elements have a very high density, i.e., 64,000 memory elements or higher. As the density of the memory array on a semiconductor chip increase, it becomes a significantly more difficult task to produce perfect semiconductor memory chips. In an effort to improve production yields and memory chip reliability, redundant memory elements or bits in the form of additional rows or columns in the memory array have been included on the semiconductor chip. The semiconductor memory may be checked when it is in a semiconductor wafer form joined to other semiconductor memory chips to determine whether it operates properly. If a faulty area is located, extra memory circuits can then be substituted for the defective elements in this faulty area on the primary memory array of memory elements.
Heretofore, there are many known existing circuits which implement the substitution of memory elements in a memory array so as to perform the necessary repairs of the faulty memory elements. These prior art circuits require the use of a high number of circuit components and have a relatively complex arrangement utilizing inverters and/or pass gates. As a result, these circuits suffer from the disadvantage of high power consumption. Further, the prior art circuits have the additional disadvantage of requiring use of a large amount of semiconductor chip area. There are shown in FIGS. 1(a) and 1(b) examples of conventional circuits 2 and 4, respectively, for producing redundancy and have been labeled with the designation "Prior Art."
It would therefore be desirable to provide a redundancy enable/disable circuit which advantageously increases the economy of manufacturing of such circuits and which decreases the amount of chip area required. It would also be expedient to provide a redundancy enable/disable circuit which utilizes a smaller number of circuit components than conventionally built circuits for producing a redundancy. In a first embodiment of the present invention, there is provided a redundancy enable/disable circuit having two programmable fuses which utilizes a relatively few number of components and consumes no DC current so as to reduce power consumption. In a second embodiment, there is provided a redundancy enable/disable circuit which is formed with even yet a smaller number of circuit components than the first embodiment, but does consume a small amount of DC current. The embodiments of the present invention are implemented without requiring the use of inverters, does not involve a complicated timing scheme, and is fabricated with a compact design layout.